DocumentCode :
1901655
Title :
Overview of Cu/low K technology failure analysis and reliability issues
Author :
Wu, Huixian ; Cargo, James ; Seier, Albert
Author_Institution :
Product Anal. Lab., Agere Syst., Allentown, PA, USA
fYear :
2003
fDate :
7-11 July 2003
Firstpage :
5
Lastpage :
11
Abstract :
Failure Analysis (FA) challenges and issues in several areas, such as physical FA, site identification, and backside FA will be addressed. New failure modes, reliability issues for advanced technology, especially for Cu/Low-k technology, and advanced FA techniques will also be discussed. For physical FA, we will discuss wet chemical etching, reactive ion etching (RIE), parallel polishing, chemical mechanical polishing (CMP) and combinations of these techniques. For site identification techniques, we will address photon based techniques, laser/electron beam based scanning systems, and electrical testing techniques. Backside FA techniques have become increasingly important for advanced technology. In this work, several backside sample preparation techniques and backside site identification techniques will also be discussed.
Keywords :
chemical mechanical polishing; copper; dielectric materials; failure analysis; integrated circuit reliability; sputter etching; Cu; chemical mechanical polishing; electrical testing; failure analysis; laser/electron beam based scanning systems; parallel polishing; photon based methods; reactive ion etching; reliability; wet chemical etching; Chemical lasers; Chemical technology; Copper; Dielectrics; Failure analysis; Integrated circuit interconnections; Laser beams; Laser theory; Silicon; Wet etching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2003. IPFA 2003. Proceedings of the 10th International Symposium on the
Print_ISBN :
0-7803-7722-2
Type :
conf
DOI :
10.1109/IPFA.2003.1222711
Filename :
1222711
Link To Document :
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