Low voltage and low power aspects of data converter design

Author

Huang, Qiuting

Author_Institution

Integrated Syst. Lab., Swiss Fed. Inst. of Technol., Zurich, Switzerland

fYear

2004

fDate

21-23 Sept. 2004

Firstpage

29

Lastpage

35

Abstract

Low voltage design is becoming an important issue for analogue circuits expected to operate around 1 V supply in sub 100 nm CMOS technologies. This contribution discusses the impact of low voltage on circuit architecture, opamp configuration to maintain speed and DC gain, common-mode feedback and its stability, switching speed, as well as trends in achievable signal to noise ratio and speed for a given power consumption.

Keywords

CMOS analogue integrated circuits; circuit feedback; data conversion; integrated circuit design; integrated circuit noise; low-power electronics; operational amplifiers; 1 V; 100 nm; CMOS technologies; DC gain; analogue circuits; circuit architecture; common-mode feedback stability; low power data converter design; low voltage data converter design; opamp configuration; opamp speed; power consumption; signal to noise ratio; switching speed; Analog integrated circuits; CMOS analog integrated circuits; CMOS technology; Circuit stability; Feedback circuits; Integrated circuit technology; Laboratories; Low voltage; Threshold voltage; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European

Print_ISBN

0-7803-8478-4

Type

conf

DOI

10.1109/ESSDER.2004.1356478

Filename

1356478