Demonstration of threshold voltage control techniques for vertical-type 4-terminal double-gate MOSFETs (4T-DGFET)

Author

Masahara, Meishoku ; Liu, Yongxun ; Sekigawa, Toshihiro ; Hosokawa, Shinichi ; Ishii, Kenichi ; Matsukawa, Takashi ; Tanoue, Hisao ; Sakamoto, Kunihiro ; Yamauchi, Hiromi ; Kanemaru, Seigo ; Koike, Hanpei ; Suzuki, Eiichi

Author_Institution

Nanoelectronics Res. Inst., Nat. Inst. of Adv. Ind. Sci. & Technol., Ibaraki, Japan

fYear

2004

fDate

21-23 Sept. 2004

Firstpage

73

Lastpage

76

Abstract

Four-terminal double-gate MOSFETs (4T-DGFETs) and three-terminal (3T)-DGFETs have been fabricated on the same chip using vertical-type DGFET technology for the first time. Successful V_th control techniques are demonstrated with the fabricated vertical 4T-DGFETs. Flexible V_th controllability for each method is comprehensibly discussed. A new V_th-control scheme, by managing the input timing for two gates independently, is also proposed.

Keywords

MOSFET; timing; 4T-DGFET; four-terminal double-gate MOSFET; gate input timing; gate offset bias; short channel effects; three-terminal DGFET; threshold voltage control techniques; vertical type MOSFET; Controllability; Fabrication; Flexible printed circuits; MOS devices; MOSFETs; Nanoelectronics; Temperature control; Threshold voltage; Timing; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European

Print_ISBN

0-7803-8478-4

Type

conf

DOI

10.1109/ESSDER.2004.1356491

Filename

1356491