DocumentCode :
1901929
Title :
Experimental comparison between double gate, ground plane, and single gate SOI CMOSFETs
Author :
Lolivier, J. ; Widiez, J. ; Vinet, M. ; Poiroux, T. ; Dauge, F. ; Previtali, B. ; Mouis, M. ; Jommah, J. ; Balestra, F. ; Deleonibus, S.
Author_Institution :
CEA/DRT-LETI, Grenoble, France
fYear :
2004
fDate :
21-23 Sept. 2004
Firstpage :
77
Lastpage :
80
Abstract :
For the first time, we report an experimental comparison between planar double gate, single gate and ground plane CMOSFETs. Thanks to an original process, we managed to co-integrate, on the same wafer, these three devices with a TiN metal gate. Short channel effect control, static performance and mobility are quantified for each architecture. The advantages of double gate devices over ground plane and single gate transistors are experimentally highlighted. Ground plane MOSFETs require an optimized BOX in order to achieve a 30% in the saturation current.
Keywords :
MOSFET; carrier mobility; silicon-on-insulator; titanium compounds; BOX optimization; SOI CMOSFET; Si-SiO2; TiN; carrier mobility; ground plane MOSFET; planar double gate MOSFET; saturation current; short channel effect control; single gate MOSFET; Boron; CMOS technology; CMOSFETs; Isolation technology; MOS devices; MOSFETs; Substrates; Testing; Threshold voltage; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European
Print_ISBN :
0-7803-8478-4
Type :
conf
DOI :
10.1109/ESSDER.2004.1356492
Filename :
1356492
Link To Document :
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