Programmable termination for CML I/O´s in high speed CMOS transceivers

Author

Ramaswamy, S. ; Gupta, V. ; Landman, P. ; Parthasarathy, B. ; Gu, R. ; Yee, A. ; Dyson, L. ; Wu, S. ; Lee, W.

Author_Institution

Texas Instrum. Inc., Dallas, TX, USA

fYear

2002

fDate

13-15 June 2002

Firstpage

72

Lastpage

73

Abstract

This paper describes I/O circuits that can be used in high-speed transceivers to communicate with next generation and legacy devices. We describe the transmitter and receiver front-end circuits that are designed to operate with dual termination voltage supplies. The receiver characterization, ESD protection and system level power up issues related to gate-oxide and electro-migration reliability are discussed.

Keywords

CMOS logic circuits; current-mode logic; data communication equipment; electromigration; electrostatic discharge; integrated circuit reliability; programmable circuits; protection; transceivers; CML I/O circuits; ESD protection; dual termination voltage supplies; electromigration reliability; gate oxide reliability; high speed CMOS transceivers; programmable termination; receiver characterization; receiver front-end circuits; system level power up issues; transmitter front-end circuits; Driver circuits; Electrostatic discharge; Impedance; MOS devices; Power system protection; Power system reliability; Switches; Transceivers; Transmitters; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits Digest of Technical Papers, 2002. Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-7310-3

Type

conf

DOI

10.1109/VLSIC.2002.1015049

Filename

1015049