Research on Dual-Processor Sharing Pair of Symmetric DRAM

This paper presents a scheme of dual-port pair of symmetric memory controlling (DPMC) system based on switching, by which the dual-processor can access the shared pair of DDR SDRAM simultaneously and without collision. Therefore, the symmetric multi-processor (SMP) structure can utilize high-density, low-price DDR SDRAM as the shared memory to improve its performance. Two pieces of DDR SDRAM used in the DPMC system are mapped to a pair of symmetric memory and used as the shard memory for dual-processor system. The DPMC system will avoid the reading collision between the processors. The DPMC system consist of command interface module, data buffer module, main controller module, quick data path module, DRAM command interface module, clock module and refresh module. The whole design is described in VHDL, and is verified with the FPGA in Xilinx EDK platform.