DocumentCode
1902517
Title
Designing a 3 GHz, 130 nm, Intel/sup /spl reg// Pentium/sup /spl reg// 4 processor
Author
Deleganes, D. ; Douglas, J. ; Kommandur, B. ; Patyra, M.
Author_Institution
Intel Archit. Group, Hillsboro, OR, USA
fYear
2002
fDate
13-15 June 2002
Firstpage
130
Lastpage
133
Abstract
The design of an IA32 processor fabricated in a state-of-the art 130 nm CMOS process with improved six layers of dual-damascene copper metallization is described. This paper describes the methodology employed to simultaneously achieve high frequency and low power in the Pentium/sup /spl reg// 4 processor, suitable for all segments-server, desktop, and mobile-meeting diverse challenges of performance, power delivery, and dissipation.
Keywords
CMOS digital integrated circuits; copper; high-speed integrated circuits; integrated circuit design; integrated circuit metallisation; low-power electronics; microprocessor chips; timing; 130 nm; 3 GHz; CMOS process; Cu; IA32 processor; Intel processor; Pentium 4 processor; clocking methodology; dual-damascene Cu metallization; high frequency operation; interconnect engineering; low power operation; thermal management; Bandwidth; CMOS process; Circuit noise; Copper; Delay; Frequency; Integrated circuit interconnections; Microprocessors; Registers; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-7310-3
Type
conf
DOI
10.1109/VLSIC.2002.1015065
Filename
1015065
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