• DocumentCode
    1902534
  • Title

    Product select multiplier

  • Author

    Conway, Craig M. ; Swartzlander, Earl E., Jr.

  • Author_Institution
    Nat. Instrum. Corp., Austin, TX, USA
  • Volume
    2
  • fYear
    1994
  • fDate
    31 Oct-2 Nov 1994
  • Firstpage
    1388
  • Abstract
    The Booth (1951) multiplier represents an efficient and simple way to multiply signed binary numbers. This paper describes an improvement to the standard implementation of a Booth multiplier at any radix. More specifically, it compares VHDL implementations of conventional radix 2, 4, 8, 16, and 32 Booth multipliers against multipliers with the product select circuitry added. VHDL models of the multipliers are analyzed and conclusions are drawn. Estimates of area gain and speedup indicate that this multiplier scheme has significant advantages at lower radices and, at higher radices, still maintains a relative advantage over the radix 2 implementation
  • Keywords
    digital arithmetic; hardware description languages; multiplying circuits; Booth multiplier; VHDL implementations; area gain; product select circuitry; product select multiplier; radix 16 multiplier; radix 2 multiplier; radix 32 multiplier; radix 4 multiplier; radix 8 multiplier; signed binary numbers multiplication; speedup; Added delay; Adders; Bridge circuits; Clocks; Delay effects; Instruments; Logic; Multiplexing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Systems and Computers, 1994. 1994 Conference Record of the Twenty-Eighth Asilomar Conference on
  • Conference_Location
    Pacific Grove, CA
  • ISSN
    1058-6393
  • Print_ISBN
    0-8186-6405-3
  • Type

    conf

  • DOI
    10.1109/ACSSC.1994.471685
  • Filename
    471685