A new design for a lookahead carry generator

Author

Kwan, Hercule ; Nelson, Robert Leonard, Jr. ; Swartzlander, Earl E., Jr.

Author_Institution

Trimble Navigation, Austin, TX, USA

Volume

2

fYear

1994

fDate

31 Oct-2 Nov 1994

Firstpage

1393

Abstract

We propose a new scheme for the Texas Instruments SN54182/SN74182 lookahead-carry generator. The SN54182/SN74182 provides a redundant carry output, C_n+x. Our re-design provides an alternative to the original design that improves the performance of adder implementations. We analyze gate delays of lookahead adders with sizes of 16, 32 and 64 bits. The examine both CMOS-AISC vendor technology and standard TTL implementations, in all cases, gate delays of sum and carry bits are improved

Keywords

CMOS logic circuits; adders; application specific integrated circuits; carry logic; delays; digital arithmetic; transistor-transistor logic; 16 bit; 32 bit; 64 bit; CMOS-AISC; Texas Instruments SN54182/SN74182; adder implementations; carry bits; gate delays; lookahead adders; lookahead carry generator; performance; re-design; redundant carry output; standard TTL implementations; sum bits; Added delay; Adders; Books; CMOS technology; Circuits; Drives; Equations; Instruments; Navigation; Pins;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems and Computers, 1994. 1994 Conference Record of the Twenty-Eighth Asilomar Conference on

Conference_Location

Pacific Grove, CA

ISSN

1058-6393

Print_ISBN

0-8186-6405-3

Type

conf

DOI

10.1109/ACSSC.1994.471686

Filename

471686