Ge deep sub-micron pFETs with etched TaN metal gate on a high-k dielectric, fabricated in a 200mm silicon prototyping line

Author

De Jaeger, B. ; Houssa, M. ; Satta, A. ; Kubicek, S. ; Verheyen, P. ; Van Steenbergen, J. ; Croon, J. ; Kaczer, B. ; Van Elshocht, S. ; Delabie, A. ; Kunnen, E. ; Sleeckx, E. ; Teerlinck, I. ; Lindsay, R. ; Schram, T. ; Chiarella, T. ; Degraeve, R. ; Cona

Author_Institution

IMEC, Leuven, Belgium

fYear

2004

fDate

21-23 Sept. 2004

Firstpage

189

Lastpage

192

Abstract

We report for the first time on deep sub-micron Ge pFETs with physical gate lengths down to 0.151 μm. The devices are made using a silicon-like process flow, with a directly etched gate stack consisting of TaN gate on an ALD or MOCVD HfO₂ dielectric. Promising drive currents are found. Various issues such as the severe short channel effects (SCE), the increased diode leakage compared to Si and the high amount of interface states (N_it) are addressed. The need for an alternative Ge substrate pre-treatment and subsequent high-k gate dielectric deposition to push EOT values below 1 nm is illustrated.

Keywords

MOCVD coatings; MOSFET; atomic layer deposition; dielectric thin films; elemental semiconductors; germanium; hafnium compounds; interface states; leakage currents; tantalum compounds; 0.151 micron; ALD; EOT; Ge substrate pre-treatment; Ge-TaN-HfO₂; MOCVD; MOSFET; diode leakage; directly etched gate stack; drive current; etched metal gate pFET; gate dielectric deposition; high-k gate dielectric; interface states; short channel effects; silicon-like process flow; Dielectric devices; Dielectric substrates; Diodes; Etching; Hafnium oxide; High-K gate dielectrics; Interface states; MOCVD; Prototypes; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European

Print_ISBN

0-7803-8478-4

Type

conf

DOI

10.1109/ESSDER.2004.1356521

Filename

1356521