DocumentCode :
1902629
Title :
Tradeoffs in the design of sliding block Viterbi decoders for MB-OFDM UWB systems
Author :
Véstias, Mário ; Sarmento, Helena
Author_Institution :
INESC-ID, ISEL/IP Lisbon, Lisbon, Portugal
fYear :
2012
fDate :
3-5 Sept. 2012
Firstpage :
173
Lastpage :
177
Abstract :
MultiBand OFDM (MB-OFDM) UWB [1] is a promising short-range wireless technology for high data rate communications up to 480 Mbps. The UWB receiver uses a Viterbi decoder that must support the highest data rate of 480 Mbps. To achieve such high data rates a sliding block Viterbi decoder is a good design candidate. In this paper, we analyze the tradeoffs involved in the design of sliding block Viterbi decoders for the highest data rates of MB-OFDM UWB systems. We have designed a configurable transmitter/receiver of an MB-OFDM UWB system and an AWGN generator in VHDL and determined the bit error rates of the system running in FPGA. The results indicate the relation between bit error rates and different configuration parameters of the sliding block Viterbi decoder.
Keywords :
AWGN; OFDM modulation; Viterbi decoding; block codes; error statistics; field programmable gate arrays; hardware description languages; radio receivers; radio transmitters; ultra wideband communication; AWGN generator; FPGA; MB-OFDM UWB receiver system; VHDL; bit error rate; bit rate 480 Mbit/s; configurable transmitter-receiver system; multiband OFDM; sliding block Viterbi decoder; Bit error rate; Decoding; Field programmable gate arrays; OFDM; Receivers; Synchronization; Viterbi algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics - Berlin (ICCE-Berlin), 2012 IEEE International Conference on
Conference_Location :
Berlin
ISSN :
2166-6814
Print_ISBN :
978-1-4673-1546-3
Type :
conf
DOI :
10.1109/ICCE-Berlin.2012.6336451
Filename :
6336451
Link To Document :
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