DocumentCode
1903042
Title
Reliability of embedded SONOS memories
Author
Van Schaijk, Rob ; Van Duuren, Michiel ; Goarin, Pierre ; Mei, Wan Yuet ; Van der Jeugd, VKees
Author_Institution
Philips Res. Leuven, Belgium
fYear
2004
fDate
21-23 Sept. 2004
Firstpage
277
Lastpage
280
Abstract
In this work, arrays of two transistor (2T) and compact SONOS memory cells are presented together with an extensive reliability investigation. SONOS, which stands for semiconductor-oxide-nitride-oxide-semiconductor, is a non-volatile memory concept, which has recently regained strong attention because floating gate flash has reached its scaling limits. The better scaling perspective, together with the ease of integration in a base line CMOS process, makes SONOS an excellent candidate for embedded flash in future CMOS generations. This is especially true for the compact cell variant, which consists of a merged access gate (AG) and control gate (CG), giving extra advantages like smaller cell size and the reduction of short channel effects compared with the discrete two transistor variant.
Keywords
electron traps; field effect memory circuits; flash memories; hole traps; integrated circuit reliability; random-access storage; tunnelling; CMOS process; electron tunnelling; embedded SONOS memories; embedded flash memory; hole tunneling; memory cell reliability; merged access/control gate cell; nitride layer charge trapping; nonvolatile memory; semiconductor-oxide-nitride-oxide-semiconductor; short channel effects; CMOS process; Character generation; Charge carrier processes; Dielectric devices; Distributed control; Electron traps; Fabrication; Nonvolatile memory; SONOS devices; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European
Print_ISBN
0-7803-8478-4
Type
conf
DOI
10.1109/ESSDER.2004.1356543
Filename
1356543
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