DocumentCode
1903123
Title
Design optimizations of a high performance microprocessor using combinations of dual-V/sub T/ allocation and transistor sizing
Author
Tschanz, J. ; Yibin Ye ; Liqiong Wei ; Govindarajulu, V. ; Borkar, N. ; Burns, Steven ; Karnik, T. ; Borkar, S. ; De, V.
Author_Institution
Microprocessor Res., Intel Labs., Hillsboro, OR, USA
fYear
2002
fDate
13-15 June 2002
Firstpage
218
Lastpage
219
Abstract
Joint optimizations of dual-V/sub T/ allocation and transistor sizing reduce low-V/sub T/ usage by 36%-45% and leakage power by 20% in a high performance microprocessor, with minimal impact on total active power and die area. An enhancement of the optimum design allows processor frequency to be increased efficiently during manufacturing.
Keywords
circuit optimisation; integrated circuit design; microprocessor chips; design optimizations; dual-V/sub T/ allocation; high performance microprocessor; leakage power; optimum design; processor frequency; transistor sizing; Circuit noise; Clocks; Delay; Design automation; Design optimization; Frequency; Logic circuits; Manufacturing processes; Microprocessors; Process design;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-7310-3
Type
conf
DOI
10.1109/VLSIC.2002.1015089
Filename
1015089
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