DocumentCode :
1903587
Title :
Efficient simulation framework for circuit design with future device technologies [MOS structures]
Author :
Göttsche, R. ; Schulz, T. ; Brüls, N. ; Krautschneider, W.
Author_Institution :
Inst. of Microelectron., Technische Univ. Hamburg-Harburg, Hamburg, Germany
fYear :
2004
fDate :
21-23 Sept. 2004
Firstpage :
385
Lastpage :
388
Abstract :
A simulation framework has been developed for fast and accurate calculation of MOS transistor characteristics. It is based on an optimized table model so that it can be run solely using experimental or simulated I-V data, i.e. without any time-consuming determination of model parameters. This model is designed in a very flexible manner, thus it can be used for advanced MOS structures, such as double-gate and FinFET transistors, as well. By this means, it facilitates the integration of a parameterized device technology directly into a conventional design flow to qualify circuits in the design space.
Keywords :
MOSFET; circuit simulation; integrated circuit design; semiconductor device models; FinFET; MOS structures; MOS transistor characteristics; circuit design simulation; double-gate transistors; optimized table model; Analytical models; CMOS technology; Circuit noise; Circuit optimization; Circuit simulation; Circuit synthesis; Energy consumption; MOSFETs; Space technology; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European
Print_ISBN :
0-7803-8478-4
Type :
conf
DOI :
10.1109/ESSDER.2004.1356570
Filename :
1356570
Link To Document :
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