Effects of buried p-layers on substrate-trap induced phenomena in GaAs MESFETs

Author

Kunihiro, K. ; Nogome, M. ; Ohno, Y.

Author_Institution

Opto-Electron. Res. Labs., NEC Corp., Ibaraki, Japan

fYear

1996

fDate

3-6 Nov. 1996

Firstpage

179

Lastpage

182

Abstract

We investigate the effects of buried p-layers (BP-layers) on substrate-trap induced frequency dispersion of drain conductance in GaAs MESFETs. Our experiments show that the condition of the BP-layers significantly influences their effectiveness in suppressing trap-induced low-frequency anomalies. These results can be well explained by the self-backgating model. While suppressing trap-induced phenomena, a BP-layer itself may cause current transients at higher frequencies due to parasitic capacitance increase; this is also investigated in detail.

Keywords

III-V semiconductors; Schottky gate field effect transistors; buried layers; capacitance; electron traps; gallium arsenide; semiconductor device models; GaAs; GaAs MESFETs; buried p-layers; current transients; drain conductance; frequency dispersion; low-frequency anomalies; parasitic capacitance increase; self-backgating model; substrate-trap induced phenomena; Electrodes; Electrostatics; FETs; Frequency measurement; Gallium arsenide; Impedance measurement; Laboratories; MESFETs; National electric code; Parasitic capacitance;

fLanguage

English

Publisher

ieee

Conference_Titel

Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1996. Technical Digest 1996., 18th Annual

Conference_Location

Orlando, FL, USA

ISSN

1064-7775

Print_ISBN

0-7803-3504-X

Type

conf

DOI

10.1109/GAAS.1996.567846

Filename

567846