DocumentCode
1903927
Title
A 1.2 V 10-b 100-MSamples/s A/D converter in 0.12/spl mu/m CMOS
Author
Blum, A.S. ; Engl, B.H. ; Eichfeld, H.P. ; Hagelauer, R. ; Abidi, Asad A.
Author_Institution
Infineon Technol. AG, Munich, Germany
fYear
2002
fDate
13-15 June 2002
Firstpage
326
Lastpage
327
Abstract
A CMOS analog-to-digital converter (ADC) utilizing folding, averaging and distributed interpolation is described. Fabricated in a digital 0.12 /spl mu/m CMOS process, the ADC occupies 0.32 mm/sup 2/ while dissipating 140 mW from a single 1.2 V supply. The experimental results show that the converter achieves 55dB SNR at sampling frequencies up to 100MHz.
Keywords
CMOS integrated circuits; analogue-digital conversion; interpolation; 0.12 micron; 1.2 V; 100 MHz; 140 mW; A/D converter; CMOS; SNR; averaging; distributed interpolation; folding; sampling frequencies; Analog circuits; Analog-digital conversion; CMOS process; CMOS technology; Dynamic voltage scaling; Interpolation; Latches; Power supplies; Resistors; Signal generators;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-7310-3
Type
conf
DOI
10.1109/VLSIC.2002.1015117
Filename
1015117
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