DocumentCode
1904219
Title
TWIn SONOS TransistOR (TWISTOR) for 2-bit/cell SONOS Memory Technology
Author
Choi, Byung Yong ; Park, Byung-Gook ; Lee, Jong Duk ; Shin, Hyungcheol ; Lee, Yong Kyu ; Sung, Suk-Kang ; Lee, Se-Hoon ; Chae, Heesoon ; Lee, Jong Jin ; Bai, Keun Hee ; Kim, Dong-Dae ; Kim, Dong-Won ; Lee, Choong-Ho ; Park, Donggun
Author_Institution
ISRC & Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ.
fYear
2006
fDate
12-16 Feb. 2006
Firstpage
72
Lastpage
73
Abstract
In terms of nonvolatile memory device characteristics, the optimal device parameters for the TWISTOR (twin SONOS transistor) structure are investigated. Through this study, we show the best performance of 80nm gate TWISTOR device, which are very promising solution of future 2-bit/cell SONOS technology
Keywords
integrated memory circuits; semiconductor-insulator-semiconductor devices; 2 bit; 2 bit/cell SONOS memory technology; 80 nm; TWISTOR structure; nonvolatile memory device; optimal device parameters; twin SONOS transistor; Channel hot electron injection; Computer science; Electronic equipment testing; Hot carriers; Nonvolatile memory; Research and development; SONOS devices; Scalability; Semiconductor device testing; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Non-Volatile Semiconductor Memory Workshop, 2006. IEEE NVSMW 2006. 21st
Conference_Location
Monterey, CA
Print_ISBN
1-4244-0027-9
Type
conf
DOI
10.1109/.2006.1629500
Filename
1629500
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