A system design for real-time fault-tolerant computer networks

A system design that provides efficient self-testing and optimal real-time diagnosis for multiprocessor computer networks is presented. In this design, a test is performed by running a common system task on two processors and comparing their signal signatures, obtained from the data port and the control register. A simple diagnosis structure to be derived from a given system architecture is proposed. Optimal real-time diagnosis is achieved using a hardware accelerator based on the unit-diagnosis structure. The hardware used for both the comparison testing and the fault diagnosis are simple, sufficient, and suitable for real-time implementation. It is shown that the proposed design can be applied to most fault-tolerant architectures