Voltage Ramp and Time-Dependent Dielectric Breakdown in Ultra-Narrow Cu/SiO2 Interconnects

Author

Park, H. ; Lee, H.-B. ; Jung, H.-K. ; Choi, Z.-S. ; Bae, J.-Y. ; Hong, J.-W. ; Choi, K.-I. ; Park, B.-L. ; Lee, E.-J. ; Kim, J.-W. ; Lee, J.-M. ; Choi, G.H. ; Moon, J.T.

Author_Institution

Process Development Team, Memory Division, Samsung Electronics Co., LTD., 445-701, KOREA, TEL: 82-31-208-4128 FAX: 82-31208-4799 E-mail: h06.park@samsung.com

fYear

2008

fDate

1-4 June 2008

Firstpage

49

Lastpage

51

Abstract

Voltage ramp dielectric breakdown (VRBD) and time-dependent dielectric breakdown (TDDB) characteristics of ~40nm-wide Cu/SiO2 interconnect dielectrics were investigated. The addition of a SiH4 treatment before capping SiN deposition led to more uniform breakdown fields, and better TDDB performance. The integration of a Ti-based barrier resulted in the best uniformity of breakdown fields, and a dramatic enhancement of TDDB reliability. The relationship between the VRBD and the TDDB characteristics was discussed, and the effect of SiH4 treatment was analyzed using TEM.

Keywords

Breakdown voltage; Dielectric breakdown; Electric breakdown; Electric variables measurement; Electrical resistance measurement; Fabrication; Logic devices; Random access memory; Silicon compounds; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2008. IITC 2008. International

Conference_Location

Burlingame, CA, USA

Print_ISBN

978-1-4244-1911-1

Electronic_ISBN

978-1-4244-1912-8

Type

conf

DOI

10.1109/IITC.2008.4546922

Filename

4546922