DocumentCode
1904685
Title
Stochastic arithmetic implementations of neural networks with in situ learning
Author
Dickson, Jeffrey A. ; McLeod, Robert D. ; Card, Howard C.
Author_Institution
Dept. of Electr. & Comput. Eng., Manitoba Univ., Winnipeg, Man., Canada
fYear
1993
fDate
1993
Firstpage
711
Abstract
The implementation of artificial neural networks using stochastic arithmetic capable of in situ learning is described. Stochastic arithmetic uses values encoded as a pulse density, and allows addition, multiplication, and the nonlinearity to be implemented in a very small amount of digital hardware. A VLSI implementation of such a network is capable of processing 100000 training vectors per second. The performance of this architecture is demonstrated by two examples
Keywords
VLSI; digital arithmetic; learning systems; neural nets; parallel architectures; VLSI implementation; neural networks; parallel architecture; pulse density; situ learning; stochastic arithmetic; Artificial neural networks; Computer architecture; Digital arithmetic; Hardware; Intelligent networks; Linearity; Neural networks; Neurons; Stochastic processes; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1993., IEEE International Conference on
Conference_Location
San Francisco, CA
Print_ISBN
0-7803-0999-5
Type
conf
DOI
10.1109/ICNN.1993.298642
Filename
298642
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