DocumentCode
1904982
Title
Signal integrity factors in high speed multi-board test setup
Author
Dattaprasad, Sandeep ; Kyaw Swa Maung ; Lew, K.S. ; Lai, Y.F. ; Chong, M.Y. ; Dey, Manoj Kumar
Author_Institution
Adv. Dev. Eng., EAO, Singapore, Singapore
fYear
2013
fDate
4-6 Sept. 2013
Firstpage
276
Lastpage
281
Abstract
There has been rapid improvement in mixed signal System on Chip (SoC) designs used in storage technologies with high-speed interfaces such as SATA 6G (Serial Advanced Technology Attachment), SAS 6G (Serial Attached Small Computer System Interface), USB 3 (Universal Serial Bus), and memory devices such as DDR2/3 (Double Data Rate). The design of such products is trending towards reduction in size of Printed Circuit Board Assemblies (PCBA) used. Development of such high speed PCBAs for storage products requires performing functional and other parametric tests for which special test platforms are needed. Such test platforms are often multi-board systems with each board in the system having highly complex devices that are sensitive to various signal integrity factors. This paper presents few of the important factors that are to be considered while designing such systems.
Keywords
high-speed integrated circuits; printed circuits; system-on-chip; DDR2/3; SAS 6G; SATA 6G; Serial Advanced Technology Attachment; Serial Attached Small Computer System Interface; SoC; USB 3; Universal Serial Bus; double data rate; high speed multi-board test setup; high-speed interfaces; memory devices; mixed signal system on chip designs; printed circuit board assemblies; signal integrity factors; storage technologies; Clocks; Crosstalk; Impedance; Pins; Reflection; Resistors; System-on-chip; DDR2/3; High speed; Multi-board; SAS; SATA; System On Chip; USB 3;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications and Information Technologies (ISCIT), 2013 13th International Symposium on
Conference_Location
Surat Thani
Print_ISBN
978-1-4673-5578-0
Type
conf
DOI
10.1109/ISCIT.2013.6645864
Filename
6645864
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