Title :
Testability analysis and insertion for RTL circuits based on pseudorandom BIST
Author :
Carletta, Joan ; Papachristou, Christos
Author_Institution :
Dept. of Comput. Eng. & Sci., Case Western Reserve Univ., Cleveland, OH, USA
Abstract :
A testability analysis technique for built-in self-test (BIST) at the system level is presented. While based on previous approaches, the model has several significant new features, including an iterative technique for modeling indirect feedback and an extension to the circular BIST methodology. Additionally, a new preprocessing transformation enables the correct modeling of word-level correlation. Examples validate the model, and demonstrate its applicability to test point insertion
Keywords :
Markov processes; automatic testing; built-in self test; integrated circuit testing; logic testing; probability; Markov model; RTL circuits; built-in self-test; indirect feedback; insertion; iterative technique; modeling; preprocessing transformation; pseudorandom BIST; register transfer level circuits; test point insertion; testability analysis; word-level correlation; Automatic testing; Built-in self-test; Circuit testing; Controllability; Costs; Feedback circuits; Observability; Registers; System testing; Test pattern generators;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1995. ICCD '95. Proceedings., 1995 IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-7165-3
DOI :
10.1109/ICCD.1995.528805
