Title :
A 5 GHz CMOS low-noise amplifier with inductive ESD protection exceeding 3 kV HBM
Author :
Leroux, Paul ; Steyaert, Michiel
Author_Institution :
ESAT-MICAS, Katholieke Univ., Leuven, Belgium
Abstract :
This work presents a 5 GHz LNA with on-chip ESD-protection provided by an integrated inductor. The circuit is implemented in a standard 0.18 μm CMOS technology. The LNA is matched at both input and output. It achieves a power gain of 20 dB with a noise figure of 3.5 dB at a power consumption of only 15 mW including the output buffer. The protection level complies with the class II HBM standard of 2 kV.
Keywords :
CMOS analogue integrated circuits; MMIC amplifiers; buffer circuits; electrostatic discharge; impedance matching; inductors; 0.18 micron; 15 mW; 2 kV; 20 dB; 3.5 dB; 5 GHz; CMOS low-noise amplifier; LNA on-chip ESD protection; class II HBM protection level; inductive ESD protection; input matching; integrated inductor; output buffer; output matching; CMOS technology; Electrostatic discharge; Energy consumption; Gain; Impedance matching; Inductors; Integrated circuit technology; Low-noise amplifiers; Noise figure; Protection;
Conference_Titel :
Solid-State Circuits Conference, 2004. ESSCIRC 2004. Proceeding of the 30th European
Print_ISBN :
0-7803-8480-6
DOI :
10.1109/ESSCIR.2004.1356676