• DocumentCode
    1906332
  • Title

    A fully integrated versatile PTP node

  • Author

    Muller, Tim ; Kero, Nikolaus

  • Author_Institution
    Oregano Syst. Design & Consulting Ltd., Univ. of Appl. Sci. Technikum Wien, Vienna, Austria
  • fYear
    2012
  • fDate
    24-28 Sept. 2012
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Today´s market offers a wide variety of IEEE1588 devices implementing the Precision Time Protocol (PTP) in many different ways. This work presents a new approach of a fully integrated PTP node by focusing on three major attributes: (i) high precision in the range of a few nanoseconds, (ii) being as versatile as possible by implementing a vast part of the standard and (iii) keeping the costs of such a device as low as possible. To satisfy these goals, different ways of implementing such a device as a ready to use System-on-Chip solution are discussed. Advantages and draw-backs of several system architectures are outlined by describing all hard- and software components and finally presenting measurement results of a prototype implementation.
  • Keywords
    computer networks; protocols; system-on-chip; IEEE1588 devices; fully integrated versatile PTP node; hardware components; precision time protocol; prototype implementation; software components; system architectures advantages; system architectures drawbacks; system-on-chip solution; Clocks; Computer architecture; Hardware; Software; Standards; Synchronization; System-on-a-chip; PTP; System-on-Chip; Versatile; high accuracy; short lock time;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Precision Clock Synchronization for Measurement Control and Communication (ISPCS), 2012 International IEEE Symposium on
  • Conference_Location
    San Francisco, CA
  • ISSN
    1949-0305
  • Print_ISBN
    978-1-4577-1714-7
  • Type

    conf

  • DOI
    10.1109/ISPCS.2012.6336615
  • Filename
    6336615