DocumentCode
1906658
Title
Optimisation of isolation for 0.5 μm CMOS technology using SILO process with R. T. N. of silicon
Author
Guegan, G. ; Deleonibus, S. ; Lerme, M. ; Reimbold, G. ; Molle, P.
Author_Institution
DTA-LETI, CENG, BP 85X 38041 Grenoble Cedex France
fYear
1991
fDate
16-19 Sept. 1991
Firstpage
647
Lastpage
650
Abstract
A complete process for field isolation, applicable to a 0.5 μm CMOS technology, has been developed using SILO process with Rapid Thermal Nitridation of Silicon (R.T.N.). Adequate isolation was achieved for 0.9 μm active area spacing and n+ to p+ distance of 2.0 μm with conventional diffused twin wells. Three p+ field doping processes were compared in terms of narrow width effect and reliability.
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1991. ESSDERC '91. 21st European
Conference_Location
Montreux, Switzerland
Print_ISBN
0444890661
Type
conf
Filename
5435251
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