DocumentCode
1908046
Title
Design and Fabrication of Improved Resurfed LDMOS Devices
Author
Hidalgo, S. ; Fernández, J. ; Berta, F. ; Godignon, P. ; Rebollo, J. ; Millán, J.
Author_Institution
Centro Nacional de Microelectr?nica (CNM), CSIC-UAB. 08193 Bellaterra. Barcelona., Spain.
fYear
1991
fDate
16-19 Sept. 1991
Firstpage
381
Lastpage
384
Abstract
The optimization of resurfed LDMOS transistors is considered in this paper. A new interdigitated LDMOS layout, characterized by a waved gate electrode, which theoretically predicts an improvement around 10% in the device specific ON-resistance, RON xS, iS presented. The experimental results from devices fabricated on epi-wafers with optimal properties, obtained from an analytical model for the device OFF-state, show the validity of the decrease of RON XS for this waved gate layout.
Keywords
Analytical models; Avalanche breakdown; Breakdown voltage; Conductivity; Design engineering; Electrodes; Fabrication; Microelectronics; Semiconductor process modeling; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1991. ESSDERC '91. 21st European
Conference_Location
Montreux, Switzerland
Print_ISBN
0444890661
Type
conf
Filename
5435306
Link To Document