Transformation of event-driven HDL blocks for native integration into time-driven system models

This paper describes a methodology to transform hardware components given as cycle-accurate, synthesizable HDL code to enable their efficient integration into a Simulink simulation. As long as the event-driven HDL model fulfills a few requirements, it can be converted to a monolithic function which allows its native execution in the time-driven model of computation of Simulink without affecting the observable behavior and timing. Since the actual HDL simulator is not needed anymore, the overhead of data exchange, synchronization and context switches between Simulink and the hardware component simulation can be reduced significantly compared to classic co-simulation. The transformation strategy is confirmed using formal models of the particular simulation semantics. Finally, results of the evaluation with two examples are shown.