DocumentCode
1908626
Title
Influence of interface traps on high-mobility channel performance
Author
Hellings, Geert ; Eneman, Geert ; Brammertz, Guy ; Martens, Koen ; Mitard, Jerôme ; Wang, Wei-E ; Hoffmann, Thomas ; Meuris, Marc ; De Meyer, Kristin
Author_Institution
Imec, Leuven, Belgium
fYear
2010
fDate
13-14 June 2010
Firstpage
1
Lastpage
2
Abstract
A technique is presented and verified to predict the electrostatic degradation of MOSFET performance, due to interface traps and their energy distribution. It provides an estimate of the technology´s sub-threshold slope degradation based on an extracted interface traps spectrum, without the need for transistor fabrication.
Keywords
MOSFET; electrostatics; interface states; MOSFET performance; electrostatic degradation; energy distribution; high-mobility channel performance; interface trap spectrum; sub-threshold slope degradation; Degradation; Electrostatics; Indium gallium arsenide; Logic gates; MOS devices; Passivation; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Silicon Nanoelectronics Workshop (SNW), 2010
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-7727-2
Electronic_ISBN
978-1-4244-7726-5
Type
conf
DOI
10.1109/SNW.2010.5562597
Filename
5562597
Link To Document