DocumentCode
1908672
Title
CMOS Technologies for Logic Applications
Author
Mingam, H.
Author_Institution
France Telecom, CNET-CNS, BP98, 38243 Meylan Cedex, France. Fax: (33) 76 90 44 74.
fYear
1991
fDate
16-19 Sept. 1991
Firstpage
243
Lastpage
252
Abstract
CMOS technology is reviewed with respect to lateral isolation, latch-up and active devices. It is shown that most of the limitations are related to defect generation and reliability issues. Process complexity as well as supply voltage reduction are the price to be paid to overcome these problems for sub-half micron generations.
Keywords
Beak; Birds; Boron; CMOS logic circuits; CMOS process; CMOS technology; Isolation technology; Logic devices; Paper technology; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1991. ESSDERC '91. 21st European
Conference_Location
Montreux, Switzerland
Print_ISBN
0444890661
Type
conf
Filename
5435331
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