Physics-Based Circuit-Level Model for Sub-Micron MOSFETs

A good circuit-level model for well-scaled submicron MOSFETs is needed in circuit simulators to design integrated circuits with these transistors in an accurate way. Due to the scaling, thinner gate insulators are required and give rise to an increase of the normal electric field in the oxide region. So the effect of surface roughness on the drain current becomes manifest. In addition a further reduction of the current is caused by the increased effect of series resistance caused by the use of graded source/drain junctions. This paper presents a physics-based circuit-level model where these effects are quantitatively taken into account.