Fabrication of a novel strained SiGe:C-channel planar 55 nm nMOSFET for high-performance CMOS

Author

Ernst, T. ; Hartmann, J.-M. ; Loup, V. ; Ducroquet, F. ; Dollfus, P. ; Guegan, G. ; Lafond, D. ; Hilliger, P. ; Previtali, B. ; Toffoli, A. ; Deleonibus, S.

Author_Institution

CEA-LETI, Grenoble, France

fYear

2002

fDate

11-13 June 2002

Firstpage

92

Lastpage

93

Abstract

We present for the first time tensile-strained epitaxially grown Si:C and SiGe:C channel NMOS devices compatible with a standard 50 nm CMOS process flow. Some of the advantages of this new architecture for CMOS integration are a highly retrograde channel doping profile and a suppression of boron diffusion and Oxidation Enhanced Diffusion (OED). Those properties lead to a dramatic decrease of short channel effects. Transport in the Si:C and SiGe:C inversion layers is characterized for the first time (77 K to 300 K) and the associated scattering mechanisms are identified. Finely tuned carbon concentration have a strong impact on transport properties.

Keywords

CMOS integrated circuits; Ge-Si alloys; MOSFET; carbon; carrier mobility; chemical vapour deposition; doping profiles; inversion layers; leakage currents; 55 nm; 77 to 300 K; B diffusion suppression; CMOS integration; RPCVD; Si:C; Si:C channel NMOS devices; SiGe:C; SiGe:C channel NMOS devices; finely tuned C concentration; high-performance CMOS; inversion layers; oxidation enhanced diffusion; retrograde channel doping profile; scattering mechanisms; short channel effects; strained SiGe:C-channel planar nMOSFET; tensile-strained epitaxially grown NMOS devices; transport properties; Atomic layer deposition; Atomic measurements; Boron; CMOS process; Doping profiles; Electrons; Fabrication; Implants; MOSFET circuits; Scattering;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2002. Digest of Technical Papers. 2002 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-7312-X

Type

conf

DOI

10.1109/VLSIT.2002.1015402

Filename

1015402