DocumentCode :
1909159
Title :
Mixed mode simulation of SRAM FinFETS
Author :
Nesamani, I. Flavia Princess ; Sindhu, P. ; Manikandan, M. ; Prabha, V. Lakshmi ; Nirmal, D.
fYear :
2012
fDate :
15-16 March 2012
Firstpage :
280
Lastpage :
283
Abstract :
The MG FinFETs are designed and its results are compared with the polysiliconFinFETs. The 6T SRAM cell is designed using both gate materials and their variations will be analysed. The 20nm tied gate device is compared with independent gate. The SRAM cell stability enhancement is improved using the IDG-FinFETs by controlling the individual Vth for the PG and the flipflop of the SRAM cell. By the Vth-controllability of the independent-double-gate (IDG) FinFETs the variation problems in SRAMperformance is reduced.
Keywords :
MOSFET; SRAM chips; flip-flops; 6T SRAM cell; IDG-FinFET; MG FinFET; cell stability enhancement; flipflop; gate materials; independent gate; independent-double-gate; mixed mode simulation; polysilicon FinFET; size 20 nm; tied gate device; variation problems; CMOS integrated circuits; EPROM; FinFETs; Logic gates; MOSFET circuits; Performance evaluation; Random access memory; IDG- Independent Double Gate; MG-Metal Gate; PG-PolysiliconGate; Vth-Threshold Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Devices, Circuits and Systems (ICDCS), 2012 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4577-1545-7
Type :
conf
DOI :
10.1109/ICDCSyst.2012.6188720
Filename :
6188720
Link To Document :
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