Title :
Low-power dissipation using FPGA architecture
Author :
Muthusamy, Sundar Prakash Balaji ; Subramaniam, Vijayan
Author_Institution :
Dept. of ECE, RVS Fac. of Eng., Coimbatore, India
Abstract :
Power optimization is the process of generating the best design in digital VLSI circuits without violating design specifications. In this paper, the existing FPGA routing switch is compared with the proposed low-power FPGA routing circuitry. The experimental results show that the power dissipation in the proposed technique is less than the existing FPGA design.
Keywords :
VLSI; circuit optimisation; field programmable gate arrays; integrated circuit design; logic design; low-power electronics; network routing; FPGA architecture; FPGA design; FPGA routing switch; design specifications; digital VLSI circuits; low-power FPGA routing circuitry; low-power dissipation; power optimization; CMOS integrated circuits; CMOS technology; Field programmable gate arrays; Integrated circuit interconnections; MOS devices; MOSFET circuits; Switches;
Conference_Titel :
Devices, Circuits and Systems (ICDCS), 2012 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4577-1545-7
DOI :
10.1109/ICDCSyst.2012.6188752
