DocumentCode :
1910100
Title :
0.25 um NMOS transistor with nitride spacer: reduction of the short channel effect by optimisation of the gate reoxidation process and reliablity
Author :
Ada-Hanifi, M. ; Bonis, M. ; Verove, Ch ; Basso, M.T. ; Revil, N. ; Haond, M. ; LeContellec, M.
Author_Institution :
SGS-Thomson Microelectronics, France
fYear :
1997
fDate :
22-24 September 1997
Firstpage :
396
Lastpage :
399
Keywords :
CMOS process; Etching; Implants; MOS devices; MOSFETs; Oxidation; Plasma chemistry; Space technology; Thermal degradation; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference, 1997. Proceeding of the 27th European
Print_ISBN :
2-86332-221-4
Type :
conf
DOI :
10.1109/ESSDERC.1997.194449
Filename :
1503379
Link To Document :
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