DocumentCode :
1910337
Title :
Variable gate oxide thickness MOSFET: A device level solution for sub-threshold leakage current reduction
Author :
Kumar, K. Keerti ; Rao, N. Bheema
Author_Institution :
Dept. of Electron. & Commun. Eng., Nat. Inst. of Technol. Warangal, Warangal, India
fYear :
2012
fDate :
15-16 March 2012
Firstpage :
495
Lastpage :
498
Abstract :
Scaling down in the MOSFET technology has been the important factor for continuous advancement in the semiconductor industry. As the technology scaling is entering the nanometer regime, one of the prominent features which come into the scenario are the short-channel effects (SCEs). Because of the SCEs, subthreshold leakage current has been the serious problem being faced by the scaled devices. At the device level, channel engineering and the threshold voltage lowering are the methods which were followed to control the subthreshold leakage current. In this paper, a new MOSFET device based on the variation of the gate oxide thickness to lower the subthreshold leakage current has been proposed. The TCAD (Technology Computer Aided Design) simulation results show the reduction of the subthreshold leakage current.
Keywords :
MOSFET; technology CAD (electronics); SCE; TCAD simulation; channel engineering; device level; device level solution; nanometer regime; scaled devices; semiconductor industry; short-channel effects; subthreshold leakage current reduction; technology computer aided design; technology scaling; threshold voltage lowering; variable gate oxide thickness MOSFET; CMOS integrated circuits; CMOS technology; Computational modeling; Integrated circuit modeling; Lead; Logic gates; MOSFET circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Devices, Circuits and Systems (ICDCS), 2012 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4577-1545-7
Type :
conf
DOI :
10.1109/ICDCSyst.2012.6188765
Filename :
6188765
Link To Document :
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