High-performance MRAM technology with an improved magnetic tunnel junction material

Author

Motoyoshi, Mizuki ; Moriyama, K. ; Mori, H. ; Fukumoto, C. ; Itoh, H. ; Kano, H. ; Bessho, K. ; Narisawe, H.

Author_Institution

Sony Corp., Yokohama, Japan

fYear

2002

fDate

11-13 June 2002

Firstpage

212

Lastpage

213

Abstract

This work is a report on high-performance MRAM technology. 0.4/spl times/0.8 /spl mu/m/sup 2/ MTJ elements were successfully integrated with 0.35 /spl mu/m CMOS technology without process-induced damage. A magnetoresistance (MR) ratio of more than 55% and the read/write operating point were obtained by introducing an improved magnetic tunnel junction (MTJ) material. The short-pulse writing in combination with an improved cell structure suggests that MRAM has a great deal of potential for low power applications.

Keywords

CMOS memory circuits; integrated circuit technology; magnetic film stores; magnetoresistive devices; random-access storage; 0.35 micron; 0.4 micron; 0.8 micron; CMOS technology integration; MRAM technology; MTJ elements; cell structures; low power applications; magnetic tunnel junction material; magnetoresistance ratio; process-induced damage; read/write operating point; short-pulse writing; CMOS technology; Energy consumption; Force measurement; Magnetic anisotropy; Magnetic field measurement; Magnetic materials; Magnetic tunneling; Perpendicular magnetic anisotropy; Shape; Writing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2002. Digest of Technical Papers. 2002 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-7312-X

Type

conf

DOI

10.1109/VLSIT.2002.1015457

Filename

1015457