DocumentCode :
1910512
Title :
White noise study of JFET´s on a new mixed rad-hard technology
Author :
Delevoye, E. ; Vet, A. Clio
Author_Institution :
LETI, (CEA-Technologies avancées) DMEL, CENG, B.P. 85X, 38041 Grenoble Cedex, France
fYear :
1992
fDate :
14-17 Sept. 1992
Firstpage :
759
Lastpage :
762
Abstract :
A new technology, called DMILL and based on re-epitaxied SIMOX structures, is being developped, with which both logic (CMOS) and analogic (JFET and BICMOS) devices are available. A good radiation hardness and a complete isolation between components is achieved. Isolation between analog and digital parts of a circuit corresponds to the trends for future low-noise mixed circuit applications. JFET´s are used as input stage because of their high input impedance and low l/f excess noise. An excess white noise level in or near saturation, depending on channel doping and gate length is observed and studied. Precise measurements are used to compare several theoretical explanations.
Keywords :
BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Circuit noise; Doping; Impedance; Isolation technology; Logic devices; Radiation hardening; White noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1992. ESSDERC '92. 22nd European
Conference_Location :
Leuven, Belgium
Print_ISBN :
0444894780
Type :
conf
Filename :
5435402
Link To Document :
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