Determination of the Generation Lifetime in Si/SiGe/Si Epitaxial Layer Stacks Grown by MBE and LPCVD using Non Equilibrium Simultaneous HF/LF MOS CV Measurements

The base region of hetero bipolar transistors (HBTs) strongly affects the maximum cut off frequency and the ideality of the Gummel plot at very low base currents. We describe electrical characterization of the SiGe HBT layer stack for optimization and routine monitoring of the stability of epitaxial growth. For the first time we report simultaneous high frequency/low frequency metal-oxide-semiconductor capacitance-voltage (HF/LF MOS CV) measurements at Si/SiGe/Si layer stacks under non-equilibrium non-steady state conditions. The measurements were performed at different temperatures. The observation of the change of the majority carrier confinement in the SiGe layer with temperature enables us to determine the cap layer thickness. Variation of the temperature also controls the minority carrier generation in the layer stack, allowing convenient evaluation of the generation lifetime in the SiGe layer. The boron spike doping often unintentionally introduced at the substrate/buffer interface can be evaluated from the doping profile, corrected for trap recharges and generation at the interfaces and in the bulk. The epilayers investigated were grown by molecular beam epitaxy (MBE) and low pressure chemical vapour deposition (LPCVD). We discuss the influence of these epitaxial techniques on the extracted generation lifetime in the SiGe layer ¿g.SiGe of the prepared HBT layer stacks. The results show that MBE combined with a low temperature pre-treatment of the wafer can significantly reduce metallic contamination and generation lifetimes to levels comparable with that of CVD grown layers can be obtained.