Title :
Test and debug strategy of the PNX8525 NexperiaTM digital video platform system chip
Author :
Vermeulen, Bart ; Oostdijk, Steven ; Bouwman, Frank
Author_Institution :
Philips Res. Labs., Eindhoven, Netherlands
Abstract :
Decreasing feature sizes and increasing customer demand for more functionality have forced design teams to re-use design blocks and application platforms. As a result, re-use of test, design-for-test and design-for-debug for large system chips is becoming increasingly important and increasingly necessary.. In this paper, the test and debug features of the NexperiaTM PNX8525 chip are presented. The PNX8525 chip is a large system chip for the consumer electronics market. The impact of core-based testing is discussed, at both the core-level and the top-level, together with the design-for-debug implementation on this multiple clock domain chip
Keywords :
CMOS digital integrated circuits; VLSI; application specific integrated circuits; computer debugging; computer testing; design for testability; image processing equipment; integrated circuit testing; logic testing; microprocessor chips; parallel architectures; reduced instruction set computing; video signal processing; CMOS chip; Nexperia PNX8525 chip; RISC CPU; SoC testing; VLIW TriMedia processor; consumer electronics market; core-based testing; debug features; design-for-debug implementation; digital video platform system chip; large system chip; multiple clock domain chip; system-on-chip; test features; Clocks; Consumer electronics; Design for testability; Electronic equipment testing; Laboratories; Process design; Productivity; Silicon; System testing; Videoconference;
Conference_Titel :
Test Conference, 2001. Proceedings. International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-7169-0
DOI :
10.1109/TEST.2001.966625
