DocumentCode
1912928
Title
Framed Poly Buffer LOCOS Technology for 0.35 μm CMOS
Author
Meyssen, V.M.H. ; Montrée, A.H.
Author_Institution
Philips Res. Labs., Eindhoven, Netherlands
fYear
1993
fDate
13-16 Sept. 1993
Firstpage
257
Lastpage
260
Abstract
An advanced isolation method, Framed Poly-Buffer LOCOS (FPBLOCOS), for a 0.35 μm CMOS technology is presented in this paper. The bird´s beak length of the FPBLOCOS isolation technique is smaller compared to the Poly Buffer LOCOS isolation scheme. Excellent thin gate oxide quality and low junction diode leakage are demonstrated. The feasibility of the isolation module was demonstrated in a 0.35 μm CMOS process where excellent device performance was achieved.
Keywords
CMOS integrated circuits; oxidation; semiconductor diodes; CMOS technology; FPBLOCOS isolation; advanced isolation method; bird beak length; framed poly buffer LOCOS technology; junction diode leakage; size 0.35 mum; thin gate oxide quality; Amorphous materials; CMOS process; CMOS technology; Etching; Isolation technology; Laboratories; Leakage current; Oxidation; Scanning electron microscopy; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1993. ESSDERC '93. 23rd European
Conference_Location
Grenoble
Print_ISBN
2863321358
Type
conf
Filename
5435501
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