Contactless digital testing of IC pin leakage currents

Testing for IC pin leakage current is important because it detects many subtle I/O circuitry faults. A technique is introduced in which the leakage current of pins is tested (or measured) during wafer probing using existing 1149.1 boundary scan access only - the tested pins are not contacted The technique requires every tested pad to have a tristate driver and receiver ("I/O wrap"), and relies on knowing approximately each pad\´s capacitance and each receiver\´s switching point voltage. Experimental results for a 500 signal-pin IC, that also contained an embedded test for the logic, show that the test program is simplified and runs on a very low cost tester in a reduced test time, while overall yield is maintained or improved