Contactless digital testing of IC pin leakage currents

Author

Sunter, Stephen ; McDonald, Charles ; Danialy, Givargis

fYear

2001

fDate

2001

Firstpage

204

Lastpage

210

Abstract

Testing for IC pin leakage current is important because it detects many subtle I/O circuitry faults. A technique is introduced in which the leakage current of pins is tested (or measured) during wafer probing using existing 1149.1 boundary scan access only - the tested pins are not contacted The technique requires every tested pad to have a tristate driver and receiver ("I/O wrap"), and relies on knowing approximately each pad\´s capacitance and each receiver\´s switching point voltage. Experimental results for a 500 signal-pin IC, that also contained an embedded test for the logic, show that the test program is simplified and runs on a very low cost tester in a reduced test time, while overall yield is maintained or improved

Keywords

application specific integrated circuits; boundary scan testing; digital integrated circuits; integrated circuit testing; leakage currents; logic testing; 1149.1 boundary scan access; I/O circuitry faults; IC pin leakage currents; contactless digital testing; integrated circuits; tristate driver; tristate receiver; wafer probing; wafer-level testing; Circuit faults; Circuit testing; Digital integrated circuits; Electrical fault detection; Fault detection; Integrated circuit testing; Leak detection; Leakage current; Logic testing; Pins;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2001. Proceedings. International

Conference_Location

Baltimore, MD

ISSN

1089-3539

Print_ISBN

0-7803-7169-0

Type

conf

DOI

10.1109/TEST.2001.966635

Filename

966635