• DocumentCode
    1913196
  • Title

    Contact technology schemes for advanced Ge and III-V CMOS technologies

  • Author

    Claeys, C. ; Firrincieli, A. ; Martens, K. ; Kittl, J.A. ; Simoen, E.

  • Author_Institution
    Imec, Leuven, Belgium
  • fYear
    2012
  • fDate
    14-17 March 2012
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    For sub 22 nm technologies the use of both Ge and III-V based devices is extensively investigated because of their promising electrical performances. However, for both types of devices it is of utmost importance to achieve ohmic contacts with a low specific contact resistivity in the order of 1×10-8 Ωcm2 or below. This paper reviews some basic aspects and recent insights in contact technology schemes for both Ge and III-V based technologies.
  • Keywords
    CMOS integrated circuits; III-V semiconductors; contact resistance; germanium; ohmic contacts; Ge; III-V CMOS technology; III-V based device; contact resistivity; contact technology scheme; electrical performance; ohmic contact; size 22 nm; Annealing; Conductivity; Doping; Germanium; Ohmic contacts; Fermi level pinning; III-V; Schottky barrier; contacts; germanium; ohmic contact; sheet resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Devices, Circuits and Systems (ICCDCS), 2012 8th International Caribbean Conference on
  • Conference_Location
    Playa del Carmen
  • Print_ISBN
    978-1-4577-1116-9
  • Electronic_ISBN
    978-1-4577-1115-2
  • Type

    conf

  • DOI
    10.1109/ICCDCS.2012.6188889
  • Filename
    6188889