Title :
Testing interconnects for noise and skew in gigahertz SoCs
Author :
Attarha, Amir ; Nourani, Mehrdad
Author_Institution :
Center for Integrated Circuits & Syst., Texas Univ., Dallas, TX, USA
Abstract :
Voltage distortion (noise) and delay violations (skew) contribute to the signal integrity loss and ultimately functional error, performance degradation and reliability problems. We present a BIST-based test methodology that includes two special cells to detect and measure noise and skew occurring on the interconnects of the gigahertz system-on-chips
Keywords :
CMOS integrated circuits; VLSI; application specific integrated circuits; automatic test pattern generation; built-in self test; delays; high-speed integrated circuits; integrated circuit interconnections; integrated circuit noise; integrated circuit testing; ASIC; ATPG; BIST-based test methodology; VLSI circuits; delay violations; gigahertz SoCs; gigahertz system-on-chips; high-speed SoCs; interconnect testing; noise measurement; signal integrity loss; skew measurement; voltage distortion; Built-in self-test; Circuit testing; Crosstalk; Delay; Integrated circuit interconnections; Integrated circuit noise; Signal design; System testing; System-on-a-chip; Voltage;
Conference_Titel :
Test Conference, 2001. Proceedings. International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-7169-0
DOI :
10.1109/TEST.2001.966646
