Challenges in RF-DPLL design for wideband phase modulation supporting SC-FDMA in LTE uplink

As one central part in polar modulators and polar transmitters the phase modulation of the RF carrier is typically realized by a two-point modulation of the RF digital phase locked loop (DPLL) generating the carrier. However, with increasing channel bandwidths, advanced modulation and channel access schemes the phase modulation suffers from several impairments such as digitally controlled oscillator gain nonlinearity and delay mismatches. But also process, voltage and temperature (PVT) variation as well as the impact of the used access scheme on calibration and tracking algorithms inside the RF-DPLL will play an important role. Those effects and their impact on characteristics like EVM, ACLR and out-of-band emissions are evaluated with respect to different resource block (RB) allocation scenarios found in single carrier frequency division multiple access (SC-FDMA) utilized in LTE uplink transmission. It is shown that the phase modulation performance is sensitive to the almost arbitrary RB allocation found in SC-FDMA especially in case of multi-cluster transmission scenarios.