A built-in timing parametric measurement unit

Author

Hsiao, Ming-Jun ; Huang, Jing-Reng ; Yang, Shao-Shen ; Chang, Tsin-Yuan

Author_Institution

Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan

fYear

2001

fDate

2001

Firstpage

315

Lastpage

322

Abstract

A built-in parametric measurement circuit is proposed for time-interval measurement and set-up/hold time measurement. The main idea is based on the dual-slope technique. The minimum resolution is set by resistor array configuration, which is 1/16 clock period in this paper, and easily extendable to desired precision. The imperfection, including the offset voltage and the settling time, is considered to improve the accuracy. Moreover, a simple calibration method is proposed to reduce the measuring error. Experiments on the SRAM access time measurement and the register set-up/hold time measurement show the practicality of the proposed unit

Keywords

SRAM chips; calibration; integrated circuit measurement; measurement errors; shift registers; time measurement; timing; SRAM access time measurement; built-in parametric measurement circuit; built-in timing parametric measurement unit; calibration method; clock period; dual-slope technique; measurement accuracy; measurement error; minimum resolution; offset voltage; register set-up/hold time measurement; resistor array configuration; set-up/hold time measurement; settling time; system-on-a-chip; time-interval measurement; Circuits; Delay; Linearity; Logic testing; Measurement units; Phase locked loops; Pulse measurements; Time measurement; Timing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2001. Proceedings. International

Conference_Location

Baltimore, MD

ISSN

1089-3539

Print_ISBN

0-7803-7169-0

Type

conf

DOI

10.1109/TEST.2001.966647

Filename

966647