DocumentCode
1913355
Title
Testing clock distribution circuits using an analytic signal method
Author
Yamaguchi, Takahiro J. ; Soma, Mani ; Nissen, Jim ; Halter, David ; Raina, Rajesh ; Ishida, Masahiro
Author_Institution
Advantest Labs. Ltd, Miyagi, Japan
fYear
2001
fDate
2001
Firstpage
323
Lastpage
331
Abstract
This paper presents an application of a new analytic signal method for measuring clock skews in the clock distribution network of microprocessors. The method can measure skews between the master system clock and distributed clocks, between two distributed clocks, or between clocks whose frequencies are related by frequency division. Experimental data using a PowerPCTM microprocessor is presented for validation
Keywords
clocks; integrated circuit measurement; integrated circuit testing; microprocessor chips; synchronisation; time measurement; timing; PowerPC microprocessor; analytic signal method; clock distribution circuit testing; clock distribution network; clock frequencies; clock frequency division; clock skews; distributed clocks; master system clock; microprocessors; Circuit analysis; Circuit testing; Clocks; Crosstalk; Delay; Frequency measurement; Microprocessors; Registers; Signal analysis; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2001. Proceedings. International
Conference_Location
Baltimore, MD
ISSN
1089-3539
Print_ISBN
0-7803-7169-0
Type
conf
DOI
10.1109/TEST.2001.966648
Filename
966648
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