• DocumentCode
    1913366
  • Title

    Rapid prototyping of time-based PDIT for substrate networks [MCM]

  • Author

    Venkataratnam, Aranggan ; Newman, Kimberly E.

  • Author_Institution
    Dept. of Electr. Eng., Rochester Inst. of Technol., NY, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    332
  • Lastpage
    339
  • Abstract
    A parallel digital interconnect test (PDIT) method was introduced in previous publications (Newman and Keezer, 1997; Newman et al, 1998). This method transmits unique digital test patterns through the substrate networks to detect catastrophic faults such as opens and shorts with 100% accuracy. The detection of resistive faults is limited, however, due to the TTL logic thresholds present in the FPGAs used to implement the test channels. A new method called time-based PDIT (T-bPDIT) was developed to overcome these limitations (Newman and Keezer, Int. J. Microcirc. and Electronic Packaging, vol 23, no. 1, pp. 1-7, 2000). The mixed-signal method not only measures the analog properties of the network in parallel, but also maintains the ability to transmit and receive the digital test patterns originally used in PDIT (Economikos et al, 1994; Kurtz, 1974). An overview of PDIT, and the methods used to implement T-bPDIT will be discussed in detail
  • Keywords
    fault location; field programmable gate arrays; hardware description languages; integrated circuit interconnections; integrated circuit packaging; integrated circuit testing; multichip modules; parallel processing; rapid prototyping (industrial); FPGAs; MCM substrate interconnect networks; T-bPDIT; TTL logic thresholds; VHDL-based rapid prototyping; catastrophic faults; digital test patterns; mixed-signal method; network analog properties; opens; parallel digital interconnect test method; rapid prototyping; resistive fault detection; shorts; substrate networks; test channels; time-based PDIT; Electrical fault detection; Electrical resistance measurement; Field programmable gate arrays; Inspection; Logic testing; Performance evaluation; Prototypes; System testing; Time domain analysis; Time factors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2001. Proceedings. International
  • Conference_Location
    Baltimore, MD
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-7169-0
  • Type

    conf

  • DOI
    10.1109/TEST.2001.966649
  • Filename
    966649