DocumentCode :
1913425
Title :
Simulation of miller OpAmp analog circuit with FinFET transistors
Author :
Contreras, Esteban ; Cerdeira, Antonio ; Pavanello, Marcelo Antonio
Author_Institution :
DIE, CINVESTAV, Mexico City, Mexico
fYear :
2012
fDate :
14-17 March 2012
Firstpage :
1
Lastpage :
4
Abstract :
In this paper we present a methodology to use the Symmetric Doped Double-Gate Model implemented in Verilog-A to simulate analog circuits with FinFET Technology. A Miller operational Amplifier was simulated in SPICE simulator and the results were validated comparing them with experimental data published in previous works.
Keywords :
MOSFET; SPICE; analogue circuits; hardware description languages; operational amplifiers; FinFET transistor; Miller OpAmp analog circuit; SPICE simulator; Verilog-A; operational amplifier; symmetric doped double-gate model; Analog circuits; FinFETs; Gain; Integrated circuit modeling; Logic gates; Mathematical model; FinFET; Miller OpAmp; SDDGM; Verilog-A;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Devices, Circuits and Systems (ICCDCS), 2012 8th International Caribbean Conference on
Conference_Location :
Playa del Carmen
Print_ISBN :
978-1-4577-1116-9
Electronic_ISBN :
978-1-4577-1115-2
Type :
conf
DOI :
10.1109/ICCDCS.2012.6188898
Filename :
6188898
Link To Document :
بازگشت