Title :
Field isolation for the Gigabit era devices
Author_Institution :
Dept. de Microelectron., CEA, Grenoble, France
Abstract :
Field isolation for Ultra Large Scale Integration devices is evolving towards product adapted architectures. Specific solutions can be used for memory or bipolar devices that we distinguish from standard logic CMOS/BiCMOS devices for which Poly Buffer LOCOS, SILO and shallow trench isolations are taken as examples.
Keywords :
ULSI; bipolar integrated circuits; isolation technology; logic circuits; oxidation; semiconductor storage; SILO; bipolar device memory; field isolation; gigabit era devices; poly buffer LOCOS; shallow trench isolation; ultra large scale integration device; BiCMOS integrated circuits; CMOS logic circuits; Degradation; EPROM; Etching; Logic devices; Oxidation; Temperature; Ultra large scale integration; Voltage;
Conference_Titel :
Solid State Device Research Conference, 1993. ESSDERC '93. 23rd European
Conference_Location :
Grenoble
