• DocumentCode
    1913743
  • Title

    0.25 μmCMOS with N2O nitrided gate oxides

  • Author

    Pomp, H.G. ; Lifka, H. ; Paulzen, G. ; Montree, A.H. ; Woerlee, P.H. ; Woltjer, R.

  • Author_Institution
    Philips Res. Labs., Eindhoven, Netherlands
  • fYear
    1993
  • fDate
    13-16 Sept. 1993
  • Firstpage
    399
  • Lastpage
    402
  • Abstract
    For a 0.25 μm CMOS process a simple and compatible two-step N2O nitridation technology was developed. High quality dielectrics were obtained for both surface channel PMOS and NMOS devices. The use of the nitridation technology improves the gate oxide quality considerably. Furthermore the technology enables the use of BF2+ for gate and drain doping of the PMOS devices. The hot carrier degradation measured at worst case condition (Vga = l/2Vds), results in a slight improvement of lifetime of PMOS devices.
  • Keywords
    CMOS integrated circuits; dielectric materials; nitridation; CMOS process; gate oxide quality; gate-drain doping; high-quality dielectrics; hot carrier degradation; nitridation technology; size 0.25 mum; surface channel NMOS devices; surface channel PMOS devices; Annealing; Boron; CMOS process; CMOS technology; Dielectric devices; Furnaces; MOS devices; Oxidation; Threshold voltage; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1993. ESSDERC '93. 23rd European
  • Conference_Location
    Grenoble
  • Print_ISBN
    2863321358
  • Type

    conf

  • Filename
    5435530
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1913743